- Hardware/Software Codesign: WS97 (J. Teich), SS99, SS00 (M. Platzner)
- Technische
Informatik 2 (operating systems): SS97, SS98 (B. Plattner); wrote device drivers in our teachable OS Topsy for the Intel 82C54 timer to be used in exercises.
- Eingebettete
Systeme (embedded systems): WS99 (L. Thiele)
- Technische
Informatik 1 (computer architecture):
SS97 - WS01 (L. Thiele), preparation of written exams.
SimpleScalar
DRAM and memory controller models:
As part of the IP
Cube (IP3) project at ETH Zurich I wrote SimpleScalar models for
SDRAMs, Direct Rambus DRAMs, and the corresponding memory controllers for microarchitecture simulation.
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M. Gries
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