Since 2007, Matthias Gries is working on design methods and architectures for memory subsystems and platform resource management at Intel Labs Braunschweig (aka. Intel Germany Research Center). Before, he spent three years at Infineon Technologies in Munich, Germany, working on microarchitectures for network applications at the Corporate Research and Communication Solutions departments. He was a post-doctoral researcher at the University of California, Berkeley, in the Computer-Aided Design group, working on design methods for application-specific programmable processors from 2002 to '04. He received the Doctor of Technical Sciences degree from the Swiss Federal Institute of Technology (ETH) Zurich in 2001 for his work on the system-level design of a QoS network processor. He received the Dipl.-Ing. degree in electrical engineering from the Technical University Hamburg-Harburg, Germany, in 1996, working on reconfigurable architectures for video processing.

His interests include architectures, methods and tools for developing x86 platforms, application-specific processors and MP SoCs, network processing, and system-level design.
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